| 摘要 |
PURPOSE: To obtain a digital filter which is variable in the number of bits of a cumulative data output after a rounding process by selecting rounding process bits by specifying one of plural rounding process parts, and rounding the selected rounding process bits. CONSTITUTION: The outputs of multipliers 11 -1n are added by adders 41 -4n to cumulative data 14 or the outputs of the adders of the precedent stages and the results are outputted to the following stages. For example, 32 multipliers 11 -1n (n=32) are provided, data supplied to the multipliers 11 -1n are composed of 8 bits, and coefficient data are also composed of 8 bits. In this case, cumulative data inputted from the adder 432 to a rounding arithmetic part 10 consists of 18 bits. At this time, a rounding address decoder 12 selects 2 or 3 rounding process bits in the rounding arithmetic part 10 and performs the rounding process to obtain a 16-bit or 17-bit cumulative data output. |
