| 摘要 |
forming a first semiconductor layer (24), a first interface layer (25), a second semiconductor layer (26), a second interface layer (27), a third semiconductor layer (28) and a third interface layer (29) in sequence after forming a contact hole by etching the first, the second, and the third insulating layer (21, 22, 23) properly; forming a forth interface layer (31) after etching the first semiconductor layer (24) to the third interface layer (29) selectively and forming a forth semiconductor layer (30), and etching the forth semiconductor layer (30) by using the third interface layer (29) as mask in order to reveal the third interface layer (29), and removing the third and the forth interface layer (29, 31); etching the second, the third, the forth semiconductor layer and the second interface layer selectively using the side wall of the fifth interface layer (32) as mask after forming the side wall of the fifth interface layer (32) by deposition and etchback of the fifth interface layer; forming a storage electrode by removing the first, the second and the fifth interface layer, and forming a plate electrode over the whole wafer after depositing a dielectric over the whole face of the storage electrode.
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