发明名称 Drain/source doping profile of high voltage transistor for sub-micron CMOS processes.
摘要 This invention relates to methodology to resolve the problem of low drain/source breakdown voltage (BVdss) in small geometry devices with thin gate oxide. Improved drain diffusion profile implanting through disjoint NSD/NWELL windows in the extended drain region, This provides essentially an improved lightly diffused (LDD) structure. Further this invention relates to alternative methods to resolve the problem of low drain/source breakdown voltage in other structures which can be achieved by for example, building a number of side wall oxide layers, impurity compensation or oxygen implantation. The improved LDD structure to which this invention relates has a number of advantages when compared with other solutions. It enables high voltage transistors to be fabricated with high drive capability, without additional process steps being required to implement the structure. The inventions will find applications wherever a high voltage capability is required to interface with the outside world. Such designs would include automotive applications; programming transistors for Field Programmable Gate Arrays; Robust I/O's and ESD Protection Circuits. <IMAGE>
申请公布号 EP0660419(A3) 申请公布日期 1996.06.26
申请号 EP19940309531 申请日期 1994.12.20
申请人 TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS LIMITED 发明人 PATHAK, VIJAY
分类号 H01L21/266;H01L21/336;H01L29/06;H01L29/78 主分类号 H01L21/266
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