| 摘要 |
a first step reference voltage generator (21) which generates voltage below reference voltage; a second step reference voltage generator (23) which generates voltage above reference voltage; a first step or coarse conversion block (10) which has plural A/D converters (10-1,10-2,etc) digitalizing an analog input signal (Ain); a first step latch block (20) which latches the output of the first step or coarse conversion block (10); a first step encoder (26) which outputs the first step digital signal of K bit by encoding the output of the latch block (20); a D/A converter (22') which outputs the digital-analog conversion signal; a first subtract block (24) which subtracts the digital-analog conversion signal from the analog input signal (Ain); a second subtract block (24-1) which subtracts the digital-analog conversion signal above the encoding level by one from the analog input signal (Ain); a third subtract block (24-2) which subtracts the digital-analog conversion signal below the encoding level by one from the analog input signal (Ain); a second step or fine conversion block (30) which has plural A/D converters (30-1,30-2,etc) digitalizing the output of the first subtract block (24); a first extended fine conversion block (40) which has plural A/D converters (40-1,40-2,etc) digitalizing the output of the second subtract block (24); a second extended fine conversion block (50) which has plural A/D converters (50-1,50-2,etc) digitalizing the output of the third subtract block (24); a second step latch block which latches the output of the fine conversion blocks (30,40,50); a second step encoder (27) which outputs the second step digital signal of L bit; a compensator (60) which outputs the first step digital signal by compensating the output of the first step encoder (26); a digital signal combining block (28) which outputs the digital signal of N bit.
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