发明名称 |
Data bit-slicing apparatus and method for computing convolutions |
摘要 |
A computer architecture that can rapidly perform a variety of repetitive mathematical operations on multimedia data sets comprises a data processing engine having n data processing devices, each of which includes shift registers and multiplexers for organizing input data into bit slices such that each of the n data processing devices can receive one bit of information from n data samples. Look-up operations are performed in a table memory of each of the n data processing devices on a bit slice, the table memory containing all possible combinations of a constant function. The results of the look-ups are shifted and accumulated to simultaneously generate multiple outputs of a convolution of an input function with the constant function. A data path provides information transfer between each of the n data processing devices.
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申请公布号 |
US5530661(A) |
申请公布日期 |
1996.06.25 |
申请号 |
US19940318461 |
申请日期 |
1994.10.05 |
申请人 |
WINNOV |
发明人 |
GARBE, OLIVIER;MILLS, CHRISTOPHER |
分类号 |
G06F1/02;G06F1/03;G06F15/80;G06F17/10;G06F17/15;G06F17/16;G06T1/20;G06T5/20;H04N7/30;(IPC1-7):G06F17/10 |
主分类号 |
G06F1/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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