发明名称 |
Non-destructive sampling of internal states while operating at normal frequency |
摘要 |
A test system for a digital integrated circuit in which internal states of the integrated circuit are captured non-destructively while the digital circuit is operating at normal clock speed. Cells for capturing states are sequentially connected into shift registers. Once internal states are latched within cells, the captured states are serially shifted out a test port while the integrated circuit continues to operate. State sampling is triggered internally via a software command or externally via an external signal synchronized to an internal clock.
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申请公布号 |
US5530706(A) |
申请公布日期 |
1996.06.25 |
申请号 |
US19950539382 |
申请日期 |
1995.10.05 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
JOSEPHSON, DON D.;ARNOLD, BARRY J. |
分类号 |
G01R31/3185;(IPC1-7):G06F15/20;H04B17/00 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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