| 摘要 |
A method is disclosed for fabricating a multi-bit storage location at the face of a layer of semiconductor. First and second conductive gates are formed insulatively spaced from the semiconductor layer and spaced from each other by an area of the semiconductor layer, at least a portion of this area comprising a first capacitor area laterally adjacent the first gate. A doped source/drain of a second conductivity type is formed in the layer adjacent the first gate and spaced from the first capacitor area. A first capacitor conductor is formed insulatively adjacent the first capacitor area and extends laterally from the first gate. A second capacitor conductor is formed insulatively adjacent a second capacitor area laterally adjacent the second gate.
|
