| 发明名称 |
Error variance circuit for improving an image signal |
| 摘要 |
A circuit has the reproduced error as detected at an error detect circuit (35) added to the image signal of the input signal picture element of n bits, and further has the variance output signal converted into a signal of m (</=n-1) bits to output on the display panel. The error detect circuit (35) has a clear circuit (42) that clears the error at every frame. This reduces to zero the prior error for every frame thus preventing excessive noise from preceding frames and non-image duration to avoid flickering of picture. <IMAGE> |
| 申请公布号 |
EP0717391(A1) |
申请公布日期 |
1996.06.19 |
| 申请号 |
EP19950308189 |
申请日期 |
1995.11.15 |
| 申请人 |
FUJITSU GENERAL LIMITED |
发明人 |
KOBAYASHI, MASAYUKI;NAKAJIMA, MASAMICHI;KOSAKAI, ASAO;ONODERA, JUNICHI;DENDA, HAYATO |
| 分类号 |
G02F1/133;G09G3/20;G09G3/28;G09G3/36 |
主分类号 |
G02F1/133 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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