| 摘要 |
<p>PURPOSE:To prevent jitter of a clock from being increased due to the amplification of an undesired signal by varying the amplification factor of an amplifier in response to the mark rate of an input signal. CONSTITUTION:A mark rate detection circuit 6 detects the mark rate of an input signal including a clock component and outputs a voltage proportional to the value. A voltage controlled type amplifier is employed for the amplifier 5' so as to vary its amplification factor according to the output voltage of the mark rate detection circuit 6 and a clock signal being an output of the amplifier 5' is given to a D flip-flop 2 and a clock output terminal 15. Thus, the increase in jitter due to the amplification of an undesired signal is prevented in this way.</p> |
