Method of manufacturing a multi-layered wiring structure of semiconductor integrated circuit device

摘要

An insulation film (15, 17, 19) is formed on a semiconductor substrate (11) in which semiconductor elements are formed. A plurality of wiring layers (23-1 to 23-4, 26-1, 26-2, 29) and interlaid insulation films (24, 27) are alternately laminated on the insulation film (15, 17, 19). The design margins of the laminated wiring layers (23-1 to 23-4, 26-1, 26-2, 29) and via holes (25, 28) formed in the interlaid insulation films (24, 27) are set to be larger as they are set at a higher level. The design margin is determined by using the focus margin, mask misalignment due to the mask alignment accuracy, pattern size conversion error, warp of the semiconductor substrate and irregularity of the surface of the semiconductor substrate as parameters.