Processor for determining shift counts based on input data

摘要

The disclosed processor includes: a first shifter for receiving a first signal and for shifting first input data in accordance with the first signal; a second shifter for receiving a second signal and for shifting second input data in accordance with the second signal; an operation unit, connected to the first shifter and the second shifter, for performing arithmetic and logic operations for the output of the first shifter and the output of the second shifter; a third shifter, connected to the operation unit, for receiving a third signal and for shifting the output of the operation unit in accordance with the third signal; a first coefficient register for storing a coefficient for the first input data; a second coefficient register for storing a coefficient for the second input data; and a shift control unit connected to the first shifter, the second shifter, the third shifter, the first coefficient register, and the second coefficient register, for determining shift counts for the first shifter, the second shifter, and the third shifter, respectively, as a function of the first input data, the second input data, the coefficient stored in the first coefficient register, and the coefficient stored in the second coefficient register, and for outputting signals indicative of the determined shift counts to the first shifter, the second shifter, and the third shifter, as the first signal, the second signal, and the third signal, respectively.