| 摘要 |
A protected switch (1, 1a, 1b) has a power first semiconductor device (3) having a first main electrode (D or S) for coupling to a first voltage supply line (3), a second main electrode (S or D) coupled to a first terminal (4) for connection via a load (L) to a second voltage supply line (6) and an insulated gate electrode (G) coupled to a control terminal (GT) for supplying a gate control signal to enable conduction of the power semiconductor device (2). A control arrangement has a normally off second semiconductor device (M14) having first and second main electrodes (d and s) coupling the normally off semiconductor device (M14) between the gate electrode (G) of the power semiconductor device (2) and one (S) of the first and second main electrodes of the power first semiconductor device and a control electrode (g) coupled via a resistance (R) to the gate electrode (G) of the power semiconductor device (2) thereby causing the normally off semiconductor device (M14) to be rendered conducting when a gate control signal is supplied to the gate electrode (G) to enable conduction of the power semiconductor device (2). A disabling arrangement (10) including a normally off third semiconductor device (M13) inhibits conduction of the normally off semiconductor device (M14) during normal operation of the power semiconductor device (2).
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