发明名称
摘要 PURPOSE:To simply compress the quantity of data after orthogonal conversion by outputting a code work being a divisor obtained by a divisor coding means, an orthogonal component representing AC and an orthogonal component representing DC obtained by a divider means. CONSTITUTION:A divisor generator 4 forming a divisor as Ai/B (B is an optional number) in case of AO<A1<-An (AO=O and Ai is an optional number) and in the case of A(i-1)<=MAX<Ai, where MAX is a maximum value obtained by a maximum value detector 3, a divider 7 using a divisor obtained by the divisor generator 4 to divide the orthogonal component representing all AC components in the block, and a divisor coder 5 coding the divisor, are provided. Then the orthogonal component representing the AC component and the orthogonal component representing the DC component obtained by the divisor 7 and the code work of the divisor obtained by the divisor coder 5 are outputted. Thus, since the maximum value of the absolute value of the orthogonal component representing each AC is >=O and <B, the fluctuation of data quantity is decreased and the compression rate is improved.
申请公布号 JP2506724(B2) 申请公布日期 1996.06.12
申请号 JP19870036090 申请日期 1987.02.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHIGESATO TATSURO
分类号 G10L19/00;G06T9/00;G10L19/02;G10L19/032;G10L25/18;H03M7/30;H04B14/00;H04N19/124;H04N19/136;H04N19/196;H04N19/423;H04N19/46;H04N19/60;H04N19/625;H04N19/70 主分类号 G10L19/00
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