发明名称 Bus controller
摘要 PCT No. PCT/JP91/01342 Sec. 371 Date Jun. 2, 1992 Sec. 102(e) Date Jun. 2, 1992 PCT Filed Oct. 3, 1991 PCT Pub. No. WO92/06432 PCT Pub. Date Apr. 16, 1992.A bus controller reduces the bus access wait time, to improve the performance of a processing unit that frequently accesses a main storage. The bus controller comprises a request signal generation unit for generating a bus right request signal according to a request from the processing unit, a bus right arbitration unit for arbitrating a bus right in response to the bus right request signal and importing the result of the arbitration, a bus access unit for accessing a bus through the processing unit serving as a bus master in response to a bus right acquisition acknowledgement, and a hold instruction unit for holding the request signal while a predetermined hold signal is being asserted and a predetermined release signal is being negated.
申请公布号 US5526494(A) 申请公布日期 1996.06.11
申请号 US19920859470 申请日期 1992.06.02
申请人 FUJITSU LIMITED 发明人 IINO, HIDEYUKI;TAKAHASHI, HIROMASA
分类号 G06F13/362;G06F13/364;(IPC1-7):G06F13/368 主分类号 G06F13/362
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