发明名称 |
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE |
摘要 |
PURPOSE: To have a multivalue memory having a small memory array area together with allowing formation of an offset region with good accuracy. CONSTITUTION: Offset source/drain regions (N-type diffusion layers) 6 are formed so that their side end parts may be located about on the extension line of the outside surfaces of the sidewall insulation layers 5 located on both sides of the first gate electrodes 3. These n-type diffusion layers 6 are self-matchedly formed by ion implantation having a sidewall insulation layers 5. Thereby, offset regions 17 are also self-matchedly formed. |
申请公布号 |
JPH08153806(A) |
申请公布日期 |
1996.06.11 |
申请号 |
JP19940294736 |
申请日期 |
1994.11.29 |
申请人 |
MITSUBISHI DENKI SEMICONDUCTOR SOFTWARE KK;MITSUBISHI ELECTRIC CORP |
发明人 |
OKUGAKI AKIRA;MORI SHINICHI;KODA KENJI;TEIKA HIROMI |
分类号 |
G11C11/56;G11C17/12;H01L21/8246;H01L27/112 |
主分类号 |
G11C11/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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