发明名称 |
Memory with adiabatically switched bit lines |
摘要 |
A semiconductor memory is described incorporating an energy conserving cyclic power source for charging and discharging the bit line with a minimum voltage across the switches. The invention overcomes the problem of power dissipation in a semiconductor memory due to charging and discharging capacitances to a voltage supply or to ground. The cyclic power supply produces a slowly varying waveform to drive the bit lines or other lines in a memory array such as a dynamic RAM in a manner so that the energy stored on those lines or in the cyclic power source is recovered at the end of the cycle.
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申请公布号 |
US5526319(A) |
申请公布日期 |
1996.06.11 |
申请号 |
US19950381791 |
申请日期 |
1995.01.31 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DENNARD, ROBERT H.;FRANK, DAVID J. |
分类号 |
G11C11/409;G11C7/12;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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