| 摘要 |
A technique allows for processing all the original cells of an integrated circuit design without any partial unnesting. In the first step, each nested cell is framed by a bounding box or polygon which contains all the shapes in the cell. In the second step, an overlap removal is performed on the frames. In the third step, for each cell, the shapes within the original frame and any other shapes intruding on the overlap removed frame are retrieved. In the fourth step, overlap removal (or union) is performed on the shapes retrieved in the third step. The overlap removed frame will clip off any pieces outside. Union will integrate any non-original shapes into the cell. After the third and fourth steps have been performed for all cells, the modified cells will contain all the original shape information and are independent.
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