发明名称 ARITHMETIC DEVICE OF MULTIVALUED LOGICAL PRODUCT
摘要 PURPOSE: To provide the operation device of AND logic, which defines the operation rule of AND for operating AND on multi-nary logics while the AND of binary numbers is contained, by containing an operation adder for obtaining a multi-nary logic value fitted to the input of the binary number and the computing element of binary-nary AND for receiving the output of the operation adder and binary input. CONSTITUTION: The AND logic operator 52 receiving the three inputs of multi- nary logic is configured of two AND logic operators 51 receiving two inputs. Such operation device of multi-nary AND logic contains the operation function of existed binary AND and the operation function of binary-multi-nary AND. For calculating the output of the logic circuit by using the binary-multi-nary AND logic operator, the operation circuit is constituted of only one binary- multi-nay AND logic operator and one operation adder. When the multi-nary AND logic operator is used, the configuration of the circuit and the like for operating the multi-nary logic value can be simplified.
申请公布号 JPH08148990(A) 申请公布日期 1996.06.07
申请号 JP19940310481 申请日期 1994.12.14
申请人 KANKOKU DENSHI TSUSHIN KENKYUSHO 发明人 KIN CHINGIYOU;KIN ZENEI
分类号 G06F7/50;G06F7/44;G06F7/49;G06F7/501;H03K19/20 主分类号 G06F7/50
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