| 摘要 |
<p>PURPOSE: To provide an asynchronous serial data receiver in which a start bit is accurately detected even on the occurrence of a noise signal with a large width such as a dropout in the start bit and a clock for data extraction is corrected with simple circuit configuration. CONSTITUTION: Asynchronous serial data receiver 1 receives data sent by a 1st shift register circuit 2 and an edge detection circuit 6 detects the falling of the received data. When an edge is detected, a window signal circuit 9 outputs a window signal, which is given to a counter circuit 4, where clock count is started. Whether or not an input signal is changed till the count of the counter circuit 4 reaches a prescribed value is monitored and when not changed, it is discriminated as a start bit. Then a decoder circuit 5 outputs a clock for data extraction depending on the count of the counter circuit 4.</p> |
