发明名称 SEMICONDUCTOR MEMORY CELL AND ITS MANUFACTURING METHOD
摘要 PURPOSE: To stabilize the operation of the memory cell of an SRAM and to miniaturize the memory cell. CONSTITUTION: MOS transistors Qt1 and Qt2 for transfer are formed by a normal LDD transistor but MOS transistors Qd1 and Qd2 for drive are formed by an LDD transistor with a large gate overlapping. The gate overlapping indicates that a low-concentration source/drain region and a gate electrode overlap. However, the amount of overlap matters. The overlapping of the MOS transistors Qd1 and Qd2 for drive is larger than that of the MOS transistors Qt1 and Qt2 for transfer.
申请公布号 JPH08148582(A) 申请公布日期 1996.06.07
申请号 JP19940286642 申请日期 1994.11.21
申请人 SANYO ELECTRIC CO LTD 发明人 SEKIKAWA NOBUYUKI
分类号 H01L21/8234;H01L21/8244;H01L27/088;H01L27/11 主分类号 H01L21/8234
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