发明名称 EMULATOR
摘要 PURPOSE: To provide the emulator with which memory access is enabled in the real operation of a user program even with an evaluation chip corresponding to a high-speed microcomputer by providing a parallel access function corresponding to the high-speed control of a memory. CONSTITUTION: This emulator is composed of the evaluation chip equipped with a /PREQ signal 8 and a /PACK signal 9 as signals for synchronization at the time of parallel access and a parallel access control part 18, to which a host CPU can perform access, or the like and this parallel access control part 18 is provided with a parallel access operation control part 23 for performing the synchronization with the evaluation chip corresponding to the /PREQ signal 8 and /PACK signal 9 based on the information transferred from a system bus interface 19 and for performing control to report the timing of parallel access start to the memory and an emulation memory interface control part 20 by making a /START signal 22 active.
申请公布号 JPH08147184(A) 申请公布日期 1996.06.07
申请号 JP19940286378 申请日期 1994.11.21
申请人 HITACHI LTD;HITACHI MICROCOMPUT SYST LTD 发明人 MIYAZAKI SUKEJI;AOKI KENICHI;OTA YUJI
分类号 G06F11/28;G06F11/22 主分类号 G06F11/28
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