| 摘要 |
<p>PURPOSE: To store image data of the PAL system to a memory efficiently in a format common to the NTSC system. CONSTITUTION: Every time a column address count clock (HCLK) is given to a column counter 14, the count is increased by one and when the count reaches 256 or over, a 9th bit CA 8 goes to a high level. A selector 15 outputs an output of a side B (LFG) as a CAD 7. CA0-CA6 are given to a multiplexer 16 as CAD0-CAD6. On the other hand, every time a row address count clock (VCLK) is given to a row counter 11, the count is increased by one at a period of a horizontal synchronizing signal and the count is added to an offset (=288) of a row address by a row address adder 12 when the CA8 is at a high level and the result is outputted as RAD0-RAD8. When the CA8 is at a low level, no addition is made and the RA0-RA8 are outputted as RAD0-RAD8.</p> |
