发明名称 METHOD AND ARRANGEMENT FOR ELIMINATING THE INFLUENCE OF HIGH-CAPACITANCE NODES
摘要 The invention relates to a method and an arrangement for avoiding the influence of a high-capacitance node on digital signal transfer in relation to a VLSI-circuit chip, for instance a CMOS-chip. A digital signal having voltage swing is converted to a digital signal having current swing and stabilized potential at the input of said node. The current swing signal is converted back to a voltage swing signal at the output of the node.
申请公布号 WO9609709(A3) 申请公布日期 1996.06.06
申请号 WO1995SE01054 申请日期 1995.09.19
申请人 FORSKARPATENT I LINKOEPING AB;TAN, NIANXIONG 发明人 TAN, NIANXIONG
分类号 G06F13/40;H04L25/02 主分类号 G06F13/40
代理机构 代理人
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