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发明名称
Digital phase-locked loop system
摘要
申请公布号
EP0310088(B1)
申请公布日期
1996.06.05
申请号
EP19880116121
申请日期
1988.09.29
申请人
SHARP KABUSHIKI KAISHA
发明人
SUDOH, KENGO;HIROSHI II;MATSUOKA, HIROYUKI
分类号
H03L7/099;(IPC1-7):H03L7/00
主分类号
H03L7/099
代理机构
代理人
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地址
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