| 摘要 |
In the D-MAC/D2-MAC broadcasting receiver including a first path for receiving a D-MAC broadcasting signal, and a second path for receiving a D2-MAC broadcasting signal which the device includes: a detecting means 21 for detecting an input line sync signal in response to the D-MAC and D2-MAC broadcasting signals; a memory means 22 for separating each bit with the bit time intervals of the first and second line sync signals inputted from the detecting means 21, and outputting parallel data; a sync signal determining means 23 for determining which line sync signal is the input sync signal from the memory means 22 among the first to fourth line sync signals; and a broadcasting mode determining section 24 for outputting a D2-MAC broadcasting selection signal when the first and second line sync signals(W1,W2) exceed a predetermined analog value of the sync signal determined by the sync signal determining means 23.
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