发明名称 System for dividing processing tasks into signal processor and decision-making microprocessor interfacing therewith
摘要 Architectures and methods are provided for efficiently dividing a processing task into tasks for a programmable real time signal processor (SPROC) and tasks for a decision-making microprocessor. The SPROC is provided with a non-interrupt structure where data flow is through a multiported central memory. The SPROC is also programmed in an environment which requires nothing more than graphic entry of a block diagram of the user's design. In automatically implementing the block diagram into silicon, the SPROC programming/development environment accounts for and provides software connection and interfaces with a host microprocessor. The programming environment preferably includes: a high-level computer screen entry system which permits choosing, entry, parameterization, and connection of a plurality of functional blocks; a functional block cell library which provides source code representing the functional blocks; and a signal processor scheduler/compiler which uses the functional block cell library and the information entered into the high-level entry system to compile a program and to output source program code for a program memory and source data code for the data memory of the (SPROC), as well as a symbol table which provides a memory map which maps SPROC addresses to variable names which the microprocessor will refer to in separately compiling its program.
申请公布号 US5524244(A) 申请公布日期 1996.06.04
申请号 US19940196389 申请日期 1994.02.15
申请人 LOGIC DEVICES, INC. 发明人 ROBINSON, JEFFREY I.;ROUSE, KEITH;KRASSOWSKI, ANDREW J.;MONTLICK, TERRY F.
分类号 G06F15/16;F02B75/02;G06F;G06F9/06;G06F9/30;G06F9/32;G06F9/355;G06F9/38;G06F9/44;G06F9/45;G06F11/36;G06F13/28;G06F15/173;G06F15/177;G06F15/78;G06F15/80;G06F17/50;(IPC1-7):G06F9/44 主分类号 G06F15/16
代理机构 代理人
主权项
地址