发明名称 MULTI-VALUED DIGITAL ENCODING SYSTEM AND DECODING SYSTEM
摘要 PURPOSE: To reduce triangular noise electric energy and to improve the S/N of a demodulate signal by using an FIR filter which has an integer value as a coefficient as a kind of deemphasis filter on a demodulator side. CONSTITUTION: An 8-bit quantized signal is generated by performing a mapping processing 10 for a parallel signal obtained through conversion 5 and the 8-bit quantized signal is processed by D/A conversion 11 and roll-off filtering 12. After the signal is converted into a waveform-shaped analog signal, FM modulation is imposed and the resulting signal is sent to a multi-valued digital demodulating device 14, which imposes FM demodulation on the received FM signal. Further, roll-off filtering and A/D conversion are performed to obtain a quantized signal in digital form, which is processed through an FIR filter processing 19 and a nod arithmetic processing 25 to obtain a 3--bit parallel signal. The obtained parallel signal is processed by S/P conversion to regenerated the original serial signal. Consequently, the triangular noise electric energy is reduced to improve the S/N of the demodulated signal.
申请公布号 JPH08139763(A) 申请公布日期 1996.05.31
申请号 JP19940272008 申请日期 1994.11.07
申请人 NIPPON HOSO KYOKAI <NHK> 发明人 IWADATE YUICHI
分类号 H04L27/32;H03H17/00;H03H17/06;H03H21/00;H04L25/49 主分类号 H04L27/32
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