| 摘要 |
PURPOSE: To prevent missing of data even when the capacitance of a capacitor decreases by executing the refresh operation a plurality of times during a single refresh cycle. CONSTITUTION: Upon receiving an external refresh request signal from a CPU 1, an internal refresh request signal RF is generated in a DRAM and fed to an internal control circuit 4 and a refresh control circuit 5 thus executing the refresh operation. After executing the refresh operation, a bar RAS signal is pulled up to High level and a bit line is precharged to return the DRAM back to a command waiting state thus starting up counting of an internal refresh counter 14. The count is checked against the number of setting times of refresh operation and when the number of setting times is not reached, the refresh operation is executed again otherwise the refresh operation is ended thus completing a single refresh cycle. |
