发明名称 CLASSIFICATION ADAPTED PROCESSING DEVICE
摘要 <p>PURPOSE: To miniaturize the hardware, to reduce the power consumption, and to reduce the cost by inserting an address conversion table to the preceding stage of a coefficient memory, namely, a coefficient ROM or RAM used for classification adapted processing. CONSTITUTION: A 12-bit address AD is supplied to an address conversion table 61 from a class code generation circuit 4. The address conversion table 61 outputs a class code C to the supplied address AD. This class code C consists of 11 bits and indicates 2048 kinds of address (class) which are the half of those of the inputted address AD. This class code C is supplied to memories 62 to 77. Predictive coefficients shown by the class code C are outputted from memories 62 to 77. Idle addresses where data doesn't exist and addresses where the same data as other addresses exist are deleted, and the conversion table 61 which converts deleted addresses into corresponding addresses is used.</p>
申请公布号 JPH08138042(A) 申请公布日期 1996.05.31
申请号 JP19940298975 申请日期 1994.11.08
申请人 SONY CORP 发明人 NAKAYA HIDEO;KONDO TETSUJIRO;UCHIDA MASASHI
分类号 H04N5/907;G06T3/40;H04N1/21;H04N7/01;H04N19/102;H04N19/115;H04N19/132;H04N19/14;H04N19/167;H04N19/189;H04N19/19;H04N19/196;H04N19/423;H04N19/426;H04N19/50;H04N19/59;H04N19/80;H04N19/98;(IPC1-7):G06T3/40;H04N7/32 主分类号 H04N5/907
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