摘要 |
PURPOSE: To prevent the amplification of a clock waveform from deviating in timing. CONSTITUTION: Input potentials of the input terminal In and In/ are driven by transistors(TR) 1 and 2 and inputted to the gates of TRs 5 and 6 in a differential couple. The TRs 5 and 6, load resistors 7 and 8, and a TR 30 as a DC current source differentially amplify the potentials of the gates of the TRs 5 and 6, and the voltages which are the amplified results are outputted from output terminals Out and Out/. Here, the low-frequency side limit of the band of the differential amplification is set as the band of high-pass filters 40 and 50. Diodes 43 and 53 of the high-pass filters 40 and 50 which form capacitive circuits vary in capacitance with control voltages applied from control terminals T1 and T2. Consequently, the band and phase difference of the limiter amplifier vary. |