发明名称 HIGH VOLTAGE SIGNAL DECODE CIRCUIT AND DRIVING METHOD THEREFOR
摘要 <p>PURPOSE: To realize high speed transmission of a high level signal on a word line or the like without increasing the current supply capacity of a high voltage generation circuit by constituting a high voltage signal decode circuit of a series connection of nMOSFET and pMOSFET being fed with first and second select signals, respectively. CONSTITUTION: A high voltage signal decode circuit comprises nM0SFETs T1N, T2N connected in series, a pMOSFET T1P, etc. A reset signal P1 is applied to the gate of the FET T2N to reset the decode circuit and then the FETs T1N and P1T are turned on by means of switching signals A1, A2, respectively. When first and second select signals S1, S2 are applied to the FETs T1N, T1P, respectively, a high level signal OUT is delivered from the output terminal. When the signals S1, S2 are fed individually, charge supply is split and a high level signal can be transmitted on a word line or the like at high rate without increasing the current supply capacity of a high voltage generation circuit or strictly following the application procedure of select signal and switching signal.</p>
申请公布号 JPH08138392(A) 申请公布日期 1996.05.31
申请号 JP19940274827 申请日期 1994.11.09
申请人 NEC CORP 发明人 TAKESHIMA TOSHIO;SUGAWARA HIROSHI;TAKADA HIROSHI
分类号 G11C17/00;G11C16/06;(IPC1-7):G11C16/06 主分类号 G11C17/00
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