发明名称 Semiconductor memory device having a coincidence detection circuit and its test method
摘要 A semiconductor memory device includes a plurality of memory blocks, a write circuit for writing data into the memory blocks, a read circuit for reading data from the memory blocks, a plurality of serial registers, each of which is connected to the corresponding memory block to output serially a plurality of data read from the memory block, a plurality of switches, each of which is arranged between two adjacent ones of the serial registers to connect the serial registers in series, and a coincidence detection circuit for detecting a coincidence of data outputted from a final serial register arranged at a final end of the serial registers connected by the switches with data outputted from a serial register arranged immediately before the final serial register.
申请公布号 US5521870(A) 申请公布日期 1996.05.28
申请号 US19940354086 申请日期 1994.12.06
申请人 NEC CORPORATION 发明人 ISHIKAWA, TORU
分类号 G01R31/28;G11C7/10;G11C11/401;G11C11/413;G11C29/00;G11C29/32;G11C29/34;G11C29/38;(IPC1-7):G11C11/40 主分类号 G01R31/28
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