Signal oscillator, FM modulation circuit using the same, and FM modulation method

摘要

A coefficient circuit 11 multiplies a digitized input modulation signal by a constant and outputs the multiplied signal. Delay circuits 12 and 13 delay the discrete in-phase input signal and discrete quadrature-phase input signal by 1 sampling cycle, respectively. A multiplying circuit 14 multiplies the multiplied signal by the 1-sampling cycle delayed discrete quadrature-phase input signal. The multiplying circuit 15 multiplies the multiplied signal by the 1-sampling cycle delayed discrete in-phase input signal. The adder circuit 16 adds the multiplication results of the multiplying circuit 14 to the 1-sampling cycle delayed discrete in-phase input signal and outputs the addition result as the discrete in-phase input signal. The subtracting circuit 17 subtracts the multiplication results of the multiplying circuit 15 from the 1-sampling cycle delayed discrete quadrature-phase input signal and outputs the subtraction result as the discrete quadrature-phase input signal.