发明名称 |
Pipeline processor for processing instructions having a data dependence relationship |
摘要 |
A pipeline processor comprises a memory stage arithmetic unit, a data dependence detecting unit and a control unit. The data dependence detecting unit outputs a detection signal to the control unit when it detects the data dependent relationship between a load instruction LD and a subtraction instruction SUB to be executed next thereto. The control unit receives the detection signal to control such that load data to be loaded from a memory unit according to the load instruction LD is inputted to the memory stage arithmetic unit. The memory stage arithmetic unit executes subtraction by using the load data in a memory stage of the subtraction instruction SUB.
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申请公布号 |
US5522052(A) |
申请公布日期 |
1996.05.28 |
申请号 |
US19950408174 |
申请日期 |
1995.03.22 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD. |
发明人 |
INOUE, MASAO;MIYAKE, JIRO |
分类号 |
G06F9/302;G06F9/38;(IPC1-7):G06F9/30;G06F9/22 |
主分类号 |
G06F9/302 |
代理机构 |
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代理人 |
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