发明名称 |
Halbleiterspeichervorrichtung |
摘要 |
An input/output switching circuit is provided between I/O blocks and I/O pads. The input/output switching circuit includes fusable elements connected in series, and a switching elements for defining connection path of I/O blocks and I/O pads in response to a potential of each one end of the fusable elements. The switching element connects an I/O block to an I/O pad in a one-to-one correspondence when all the fusable elements are conductive. When one fusable element is disconnected, the switching element isolates a corresponding defective I/O block from an I/O pad, and switches the connection path of each I/O block towards the pad corresponding to the defective I/O block. In a semiconductor memory device having an error checking bit, the manufacturing yield of a semiconductor memory device can be improved by isolating a defective I/O block that cannot be repaired by a normal redundant circuit scheme, and operating the same as a semiconductor memory device without an error checking bit. |
申请公布号 |
DE4316283(C2) |
申请公布日期 |
1996.05.23 |
申请号 |
DE19934316283 |
申请日期 |
1993.05.14 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP |
发明人 |
MORI, SHIGERU, ITAMI, HYOGO, JP |
分类号 |
G11C11/401;G11C29/00;G11C29/04;G11C29/42;(IPC1-7):G11C29/00 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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