| 摘要 |
<p>PURPOSE: To accelerate arithmetic processing speed by reducing an arithmetic load by applying the butterfly arithmetic of high-speed Fourier transform (FET) to input signal sub-band dividing processing. CONSTITUTION: Source data x1 ' of an audio signal are inputted to a window arithmetic part 1, window arithmetic is performed based on a specified expression, and an audio signal y1 ' at every time is provided. The signal y1 ' is inputted to a convolusion arithmetic part 2, convolution arithmetic is performed in each cycle 128 based on a specified expression, and a preprocessing arithmetic signal Y1 is provided. The signal Y1 is inputted to a butterfly arithmetic part 3 and inputted to a phase correcting part 4 after the butterfly arithmetic as the basic arithmetic of FFT(fast Fourier transformation) is executed. The correcting part 4 corrects the deviation of a phase by performing rotary arithmetic and outputs sub-band information S1 . In this case, when performing the arithmetic at the arithmetic part 3 and the correcting part 4, the function values of sine and cosine previously stored in sine and cosine function ROM 6 and 7 are respectively used.</p> |
