| 摘要 |
PURPOSE: To provide a semiconductor memory in which a large capacity can be realized without complicating manufacturing steps by forming a multilayer structure only to increase the capacity and a method for manufacturing the same. CONSTITUTION: A first capacitor electrode 8 is interposed between a source and drain electrode 4 and a second capacitor electrode 10, thereby obtaining a large capacitor capacity with a small cell area. The electrode 4 and a gate electrode 7 are formed of the same polysilicon layer depositing step, and hence the same degree of the number of layers and the number of steps as those of a conventional stack type are provided, and there is no anxiety of complicating the structure and the steps. In addition, an impurity is introduced to a source and drain region 3 by diffusion from polysilicon to provide a shallow junction, thereby easily miniaturizing a transistor. |
