发明名称 HIGH-EFFICIENCY ENCODER
摘要 PURPOSE: To reduce quantizing error by providing a quantizing means, inverse quantizing means and error detecting means, comparing block quantizing errors corresponding to quantizing step width and selecting a code with the quantizing step width of least error. CONSTITUTION: An inputted signal is applied to a DCT 2 of a discrete cosine transform part and the transformed signal is applied to quantizers 11, 21 and 31 and subtracters 15, 25 and 35. At the quantizers 11 and 21, quantization is performed by QS and QS+1, and the quantizer 31 sets the quantizing step width at QS+2. Delayers D19, 29 and 39 are applied to the fixed length codes of outputs from the quantizers 11, 21 and 31. A changeover switch 3 selects any output of the least error out of the outputs of the quantizers 11, 21 and 31 corresponding to selection information applied from a minimum value detector 7. A multiplexer MUX 4 and a buffer 5 output the code, which is compressed and turned to a fixed transfer rate, from a code output 6. Thus, when the total amount of codes is fixed, the entire quantizing error is reduced.
申请公布号 JPH08130479(A) 申请公布日期 1996.05.21
申请号 JP19940290651 申请日期 1994.10.31
申请人 VICTOR CO OF JAPAN LTD 发明人 SUGIYAMA KENJI
分类号 H04N19/126;G06T9/00;H03M7/30;H04B14/04;H04N1/41;H04N7/24;H04N19/00;H04N19/146;H04N19/15;H04N19/154;H04N19/176;H04N19/189;H04N19/196;H04N19/423;H04N19/46;H04N19/625;H04N19/70;H04N19/85;H04N19/91 主分类号 H04N19/126
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