| 摘要 |
PURPOSE: To prevent an output voltage from being lowered by respectively using a P channel MOS transistor as a switch near a high potential, an N channel MOS transistor as a switch near a low potential and a transmission gate near an intermediate potential. CONSTITUTION: At P channel MOS transistors 810 to 816 near a power supply potential VDD, when turning them on by impressing 0V to their gates, concerning its gate/source potential|VGS|, a voltage sufficiently larger than a threshold voltage Vt is secured. Therefore, no voltage drop occurs and the potential of a voltage dividing point is outputted to an output terminal 4 as it is. On the other hand, at N channel MOS transistors 801 to 806 near a ground potential, when turning them on by impressing the VDD to their gates, the voltage of the voltage dividing point is lowered rather than (VDD-Vt) so that the voltage of the voltage dividing point can be outputted to the terminal 4 as it is without getting lowered. Further, since transmission gates 807, 808 and 809 are used near the intermediate potential, this D/A converter is stably operated.
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