Synchronization signal generating circuit

摘要

A synchronization signal generating circuit generates a synchronization signal used to output read data sequentially in a specified period. This circuit is provided with a clock generator means for generating a reference clock, a first counter unit for counting the reference clock; a synchronization signal generator for generating the synchronization signal in a first period in accordance with a count value of the first counter unit; a second counter unit for counting the generation of the synchronization signal; a resetter for resetting the second counter unit when a count value of the second counter unit reaches a specified value; and a period changer for controlling the synchronization signal generator so as to generate the synchronization signal in a second period only when the count value of the second counter unit reaches the specified value. Accordingly, a shift amount of the period of the synchronization signal relative to the specified period in which data are output sequentially does not exceeds a predetermined level.