| 摘要 |
FIELD: computer engineering, control devices for information processing. SUBSTANCE: device has OR gate 1, AND gate 2, control counter 3, OR gate 4, commutator 5, memory unit 6, delay line 7, AND gate 8, control flip-flops 9 and 10, OR gate 14, (N+3) AND gates 15, N output JK flip-flops. Introduced commutator 5, control flip-flop 9, OR gate 4 first and second AND gates 2 and 8 result in possibility of storage new data codes to memory unit 6 when device operates. Introduced control flip-flop 10, AND gate 11, shift register 12, AND gate 13 and OR gate 14 provide possibility of delay between edges of output signals. EFFECT: possibility of data change when device operates. 2 dwg |
