INTEGRATED CIRCUIT PASSIVATION PROCESS AND STRUCTURE

摘要

A method for forming a UV transmission passivation coating on an integrated circuit, such as an EPROM, after completion of the active device and metal routing circuitry (11-17 and 20-22) comprising a first barrier dielectric layer (24) over the integrated circuit; smoothing out underlying features by applying a layer of flowable dielectric (25) over the first dielectric layer; and depositing a second dielectric layer over the flowable dielectric, which is composed of a first protective dielectric (27), such as silicon oxynitride, and a phosphorus doped silica layer (28) to provide a stress buffer.