发明名称 HIGH-SPEED COMPARATOR CIRCUIT AND COMPARISON METHOD OF DATA BIT
摘要 PROBLEM TO BE SOLVED: To provide a comparator circuit which can operate with reliability with the small number of stages. SOLUTION: The high-speed comparator circuit is provided with plural first switches XOR operating in parallel. First and second data words are inputted to the first switches. When the data words are matched, a first logic state output is given. When they are not matched, a second logic state output is given. The plural second switches receive the logic state outputs and give combined outputs showing that the whole words are matched or they are not matched to first switches 82 and 84. The third switches are connected to first and second branch nodes 44 and 46, generate a first voltage difference between the first and second branch nodes when the whole words are matched, and generate a second voltage difference when they are not matched. A sense amplifier amplifies the voltage difference which becomes large in accordance with imbalance generated in the conduction of the two branch nodes.
申请公布号 JPH08123661(A) 申请公布日期 1996.05.17
申请号 JP19950228737 申请日期 1995.09.06
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 BAABARA ARAN CHIYATSUPERU;TERII AIBUAN CHIYATSUPERU;BURUUSU MAATEIN FUREISHIYAA;SUTANREI EBUARETSUTO SHIYUUSUTAA
分类号 G06F7/04;G06F7/02;(IPC1-7):G06F7/04 主分类号 G06F7/04
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