发明名称 |
Production process of an error correcting parameter associated with the implementation of modular operations according to the Montgomery method |
摘要 |
<p>The modulo (N) is loaded into a shift register (12) through a multiplexer (42) whose second input is connected to the output of the shift register (12). A second shift register (10) is loaded with (n) initialisation bits of zero through a second multiplexer (41). A subtraction circuit (27) receives the output from the second shift register (10) and the output from the first shift register (12) via a multiplexer (36) and then supplies a second subtraction circuit (40). A gate (43) is fed from the outputs of the two subtraction circuits and supplies a circuit (44) which stores the comparisons.</p> |
申请公布号 |
EP0712070(A1) |
申请公布日期 |
1996.05.15 |
申请号 |
EP19950470037 |
申请日期 |
1995.10.26 |
申请人 |
SGS-THOMSON MICROELECTRONICS S.A. |
发明人 |
MONIER, GUY |
分类号 |
G06F7/72;G06F11/10;G06F17/10;G09C1/00;H03M13/00;H04L9/10;(IPC1-7):G06F7/72 |
主分类号 |
G06F7/72 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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