Method of anticipated reading of a serial accessed memory and related memory

摘要

The method includes using a memory (1) with an input address (2), clock control (4) and READ control (5). On input, digital words are passed to a register address (RI). The output from the address is split into lines and columns of information. There is a line decoding (LD) and column decoding (CD) section. The decoding is controlled from the read and clock control circuits (CC). Output information is passed to two multiplexers (MUX1, MUX2) and then to read circuits (SA1, SA2) before passing to an output multiplexer (MUXS). The multiplexer passes data to the output register (RO) and to an output data port (3).