| 摘要 |
An integrated circuit terminal of a data processing system (10) is used to communicate multiplexed signals with an external device. During a reset operation in which a reset signal is asserted, a desired internal clock signal is driven to the integrated circuit terminal such that an emulation system (52) may use the internal clock signal to synchronize an emulation operation. After the reset signal is negated, the emulation system synthesizes the internal clock signal for use during emulation. External visibility of a write operation to a register which controls pertinent signal parameters is provided via other integrated circuit terminals when the data processor operates in an emulation mode. The external visibility allows the development system to make similar changes to corresponding signal parameters therein. Therefore, the development system is able to accurately synchronize an emulation operation even when signal parameters are modified during operation. <IMAGE> |
