发明名称 Alpha blending calculator
摘要 The alpha blending calculator of the invention executes an alpha blending calculation in accordance with digital data X, Y, and alpha . The alpha blending calculator includes multiplexers which select one of X or Y in accordance with bits of the digital data alpha , respectively, and a calculating section for shifting outputs of the multiplexers by a predetermined number of bits, respectively, and for calculating a sum of the shifted outputs. The calculating section includes first level to Nth level adding portions, and an adder connected to the outputs of the Nth level adding portion for executing a multi-bit addition. Each of the first level to the Nth level adding portions receives a plurality of stages of data, classifies the plurality of stages of data into quotient groups and a remainder group, calculates a sum and a carry for each of the quotient groups, and outputs the sum, the carry, and the stages of data in the remainder group to the next level adding portion. The outputs of the multiplexers are input as the plurality of stages of data to the first level adding portion, and the outputs of the Nth level adding portion consist of a sum and a carry.
申请公布号 US5517437(A) 申请公布日期 1996.05.14
申请号 US19940263814 申请日期 1994.06.22
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 YAMASHITA, TOMOO;WAKAYAMA, YORIHIKO;NISHIMURA, AKIO;NISHIZAWA, TEIJI
分类号 G06F7/509;G06F7/52;G06F7/53;G06F17/10;(IPC1-7):G06F7/38 主分类号 G06F7/509
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