Semiconductor memory device having refresh circuits

摘要

A semiconductor memory device including dynamic memory cells for which refresh operation is required, wherein one fundamental cycle consists of a normal operation for carrying out writing or reading into or from the memory cells and a refresh operation. This semiconductor memory device comprising: a refresh signal generating circuit supplied with a clock signal to generate a refresh signal indicating start of refresh; a count signal generating circuit supplied with the clock signal to generate a count signal required for selection of a memory cell to be refreshed, a refresh counter circuit supplied with the refresh signal and the count signal to select a word line and a bit line to which a memory cell to be refreshed is connected; and a precharge circuit supplied with the refresh signal to carry out precharge of the bit line for refresh.