发明名称 Mikroprozessoranordnung für ein Fahrzeug-Regelungssystem
摘要 Proposed is a microprocessor arrangement for a vehicle control system with a plurality of microprocessor systems that are linked by a bus system and that carry out at least an anti-lock braking (ABS) and automatic slip control (ASR) as well as at least one other high-computation control function, such as yaw moment control (GMR), and monitoring functions. The microprocessor arrangement comprises three microprocessor systems (1, 2, 3; MP1, MP2, MP3) to which the individual functions are allocated such that the first microprocessor system (1, MP1) together with the second microprocessor system (2, MP2) perform the ABS and ASR functions, including monitoring of these functions, and the third microprocessor system (3, MP3) together with the second microprocessor system (2, MP2) execute the other control function (GMR) and its monitoring.
申请公布号 DE4439060(A1) 申请公布日期 1996.05.09
申请号 DE19944439060 申请日期 1994.11.02
申请人 ITT AUTOMOTIVE EUROPE GMBH, 60488 FRANKFURT, DE 发明人 FENNEL, HELMUT, 65812 BAD SODEN, DE;KANT, BERNHARD, 65239 HOCHHEIM, DE;ESSELBRUEGGE, HERMANN, 64331 WEITERSTADT, DE;ZYDEK, MICHAEL, 35428 LANGGOENS, DE;GIERS, BERNHARD, 64380 ROSDORF, DE
分类号 B60R16/02;B60T8/00;B60T8/17;B60T8/172;B60T8/175;B60T8/1755;B60T8/1764;B60T8/24;B60T8/32;B60T8/58;B60T8/88;B60W10/04;B60W10/18;F02D29/02;F02D45/00;G05B9/03;G05B23/02;G06F11/18;G06F11/30;(IPC1-7):B60T8/32;B60K28/16 主分类号 B60R16/02
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