| 摘要 |
A method for minimizing power consumption in a circuit is accomplished by identifying, based on the test parameters and topology information for the circuit, potential excessive power consuming sites. Next, the potential excessive power consuming sites, or potential leakage current sites, are monitored, based on the test parameters, for indeterminate logic states which result in leakage current and excessive power consumption. A report is generated detailing the locations of any leakage current sites, whereby the circuit may be modified to eliminate the leakage current sites prior to fabrication.
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